A multiprocessor-on-a-programmable-chip reconfigurable system for matrix operations with power-grid case studies
Recent advances in field-programmable gate array (FPGA) technologies have made feasible the implementation of low-cost parallel computing platforms for high-performance matrix computations. Compared to conventional multiprocessor systems, the resulting multiprocessors-on-a-programmable-chip (MPoPC)...
|Journal Title:||International Journal of Computational Science and Engineering Vol. 10; no. 1; pp. 181 - 191|
|Authors:||X. Wang, S. G. Ziavras|